Analog Bits Executive Vice President, Mahesh Tirupattur, was recently interviewed by EE Times. See the interview below.

Analog Bits will showcase multiple working analog IPs at the 2025 Design Automation Conference, including at 2nm and 3nm nodes.

We are honored to be featured in a recent SemiWiki article highlighting our demos of working IP on TSMC 3nm and 2nm at the TSMC 2025 North American Technology Symposium

Novel Power Management such as LDO, Droop Detector, Low Jitter and Pinless Clocking and High Accuracy PVT Sensor IP’s

We were honored to be featured in a recent SemiWiki article looking back at highlights from 2024. Our CEO, Mahesh Tirupattur, also discusses our plans for business growth and expectations for the industry in 2025.

We were honored to be featured in a recent SemiWiki article highlighting our recent sensing and power management innovations presented at the recent TSMC Open Innovation Platform (OIP) Ecosystem Forum.

Analog Bits will be demonstrating their newest LDO IP, Power supply droop detectors, Embedded Clock LC PLL’s, and more in TSMC N3P process at their booth at the 2024 TSMC Open Innovation Platform Ecosystem Forum in Santa Clara Convention Center, Santa Clara, California.

We were honored to be featured in a recent SemiWiki article highlighting our emerging 2nm designs and our focus on the future.

Silicon Catalyst, an incubator exclusively focused on accelerating semiconductor solutions, announced that Analog Bits, Inc. has joined as a new member of its In-Kind Partner (IKP) ecosystem.

Analog Bits will be demonstrating newest LDO IP, Power supply droop detectors, Embedded Clock LC PLL’s, etc. in TSMC N3P process at their booth at the TSMC 2024 North America Technology Symposium in Santa Clara Convention Center, Santa Clara, California.