Temperature variation is a particularly acute problem below 65nm process lithography as increased power density and ever-thinning wires induce electro-migration, product life, and reliability issues to the point of potentially causing system-on-chip (SoC) field failures.

Large die are especially susceptible to temperature and voltage variation, often requiring close, careful monitoring. Sensor IP enables SoCs to not only monitor, but also scale the workload and operating voltage to maintain chip temperature within a narrowly pre-defined range.